The present invention relates to a non-volatile semiconductor memory device made of semiconductor elements, and particularly to a write circuit for applying a high voltage to a memory cell.
Non-volatile semiconductor memory devices such as Electrically Programmable Read Only Memories (EPROMs), memory contents of which are erasable by ultra-violet rays, have been widely utilized in many kinds of electronic systems. As a memory cell of such EPROMs, an MIS transistor having a stacked gate structure has been mainly employed. The above type MIS transistor has a floating gate located above a channel region via an insulating layer and a control gate located above the floating gate via an insulating layer. The control gate of each MIS transistor is connected to a word line while a drain thereof is connected to a digit line in a matrix form. The memory state of each MIS transistor corresponds to a value of a threshold voltage which is determined by electric charge accumulated in its floating gate. Upon writing to an MIS transistor memory cell of the above type, potentials at its control gate and drain are raised with its source held at a ground potential so that avalanche breakdown is caused at the drain and hot electrons are injected to the floating gate, whereby a threshold voltage of the memory cell transistor is changed.
A conventional write voltage supply circuit for applying a high write voltage V.sub.pp to a control gate of a memory cell transistor in writing is comprised of a series circuit of a switching MIS transistor and a current limiting MIS transistor of a depletion type. Through this series circuit, the high write voltage V.sub.pp is applied to a control gate of a memory cell MIS transistor to be written. The purpose of using the current limiting MIS transistor is to limit a value of a current flowing the V.sub.pp voltage to the ground potential.
However, the current limiting transistor is of a depletion type and therefore, steps in manufacturing the memory is inevitably increased, thus raising cost and reducing yield in manufacturing. In addition, the current limiting transistor must have a relatively large resistance and hence a channel length of the current limiting transistor must be large. This has increased the size of a semiconductor chip on which a memory device is fabricated.